KS10-PA module utilization	John Wilson <wilson@dbit.com> 09/25/1999

The KS10-PA card cage is organized into three 9-slot backplanes.  These are
shown (from the front) as three separate diagrams here, to keep it under 80
columns).  The left-hand backplane is the disk RH11C Massbus adapter (attached
to UBA1), and is only regular depth (standard hex boards).  The RH11C is the
same as the RH11AB used on PDP-11s, except for the substitution of the M7294-YA
for the usual M7294, and the jumper settings.

   29      28      27      26      25      24      23      22      21
+-------+-------+-------+-------+-------+-------+-------+-------+-------+
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	| A
|	|	|	|	|	|	|	|	| M9014	|
| M9300	| M9300	| empty	| empty	| empty	| empty	|	|	| from	|
|	|	|	|	|	|	|	|	| UBA1	|
|	|	|	|	|	|	|	|	|	| B
|	|	|	|	|	|	|	|	|	|
+-------+-------+-------+-------+-------+-------+	|	+-------+
|	|	|	|	|	|	|	|	|	|
| empty	| empty	| empty	|	|	|	|	|	|	| C
|	|	|	| M5904	| M5904	| M5904	|	|	| M7297	|
+-------+-------+-------+  xcvr	|  xcvr	|  xcvr	| M7294	| M7295	|  PAC	|
|	|	|	|   C	|   B	|   A	|  -YA	|  BCT	|	|
| G727	| G727	| G727	|	|	|	|  DBC	|	|	| D
|	|	|	|	|	|	|	|	|	|
+-------+-------+-------+-------+-------+-------+	|	+-------+
|	|	|	|	| M688	|  M688	|	|	|	|
|	|	|	|	|p. fail|p. fail|	|	| M7296	| E
|	|	|	|	|   A	|   B	|	|	|  CSR	|
| empty	| empty	| empty	| empty	+-------+-------+	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	| empty	| empty	|	|	|	| F
|	|	|	|	|	|	|	|	|	|
+-------+-------+-------+-------+-------+-------+-------+-------+-------+

The middle 9-slot backplane is the CPU proper, made up of extended hex boards.
Note the sequence break:  slot 20 is the gap between the LH and middle
backplanes and does not take a board.  The addresses for the UBAs are wired
into the slot so the "disk" (#1) and "tape" (#2) ones are interchangeable.
Note however that the order of the three 40-pin Berg connectors (which lead to
the M9014 paddle board in the Unibus backplane) is different depending on the
revision of the M8619 UBA board, so be careful.

The density of the horrible Fairchild 93L415 SRAM chips used in the CRAM is so
bad that it takes two boards to get 2 K microwords.  According to Don Lewine,
the crappy reliability of these memories actually led to a patent on the KS10's
soft parity recovery, where as long as a CRAM parity error doesn't come in the
middle of a main memory cycle, the 8080A can reload a fresh copy of the
microcode from disk and then let the system continue.

Trivia:  the PCB in the KS10 CPU backplane was actually designed for the DH11
serial mux.  Of course the wire wrap is different here though.

   19      18      17      16      15      14      13      12      11
+-------+-------+-------+-------+-------+-------+-------+-------+-------+
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	| A
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	| B
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	| C
| M8619	| M8616	| rsvd	| M8619	| rsvd	| M8621	| M8620	| M8622	| M8623	|
| UBA1	|  CSL	|  for	| UBA3	|  for	|  DPM	|  DPE	|  CRA	|  CRM	|
|	|	|  DEC	|	| UBA2	|	|	|	|	|
| disks	| 8080A	|	| tapes	|	| data	| data	| ctrl	| ctrl	| D
|	|  FE	|	|	|	| paths	| paths	| RAM	| RAM	|
|	|	|	|	|	| mem	| exec	| addrs	| mem	|
|	|	|	|	|	|	|	| +bits	| bits	|
|	|	|	|	|	|	|	| 0-35	| 36-95	| E
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	| F
|	|	|	|	|	|	|	|	|	|
+-------+-------+-------+-------+-------+-------+-------+-------+-------+

The right-hand 9-slot backplane is the memory system, also made entirely of
extended hex boards.  Again, the sequence breaks, slot 10 is just the useless
space between backplanes and doesn't take a board.  All the brains (DRAM
timing, ECC) are in the MMC board at the left, the memory array boards have
little more than just the DRAM chips on them.  The MMA boards are worth 64 KW
each, DEC claims you can go with as few as two boards but boy you'll be sorry,
even with the full 512 KW it's pretty slow.

    9       8       7       6       5       4       3       2       1
+-------+-------+-------+-------+-------+-------+-------+-------+-------+
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	| A
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	| B
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	| C
| M8618	| M8629	| M8629	| M8629	| M8629	| M8629	| M8629	| M8629	| M8629	|
|  MMC	|  MMA	|  MMA	|  MMA	|  MMA	|  MMA	|  MMA	|  MMA	|  MMA	|
|	|	|	|	|	|	|	|	|	|
| MOS	|  MOS	|  MOS	|  MOS	|  MOS	|  MOS	|  MOS	|  MOS	|  MOS	| D
| mem	|  mem	|  mem	|  mem	|  mem	|  mem	|  mem	|  mem	|  mem	|
| ctrl	| array	| array	| array	| array	| array	| array	| array	| array	|
|	|	|	| (opt)	| (opt)	| (opt)	| (opt)	| (opt)	| (opt)	|
|	|	|	|	|	|	|	|	|	| E
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	|
|	|	|	|	|	|	|	|	|	| F
|	|	|	|	|	|	|	|	|	|
+-------+-------+-------+-------+-------+-------+-------+-------+-------+